1. Field
Example embodiments relate to semiconductor devices, and methods of manufacturing the semiconductor devices. More particularly, example embodiments relate to semiconductor devices including a complementary metal-oxide-semiconductor (CMOS) transistor having improved operation characteristics, and methods of manufacturing the semiconductor devices including the CMOS transistor having improved operation characteristics.
2. Description of the Related Art
A memory circuit or a logic circuit may include a metal-oxide-semiconductor field effect transistor (MOSFET, hereinafter referred to as a transistor) serving as a unit device. A transistor that has a high speed operation at a low-voltage and is small and highly integrated has been developed.
Recently, in order to form a transistor having a high speed operation, methods of forming a channel region of the transistor at a silicon substrate under tensile or compressive stress have been introduced. For example, a stress memorization technique (SMT) method in which a silicon nitride layer is formed on a substrate and a heat treatment is performed on the substrate is being used to change the stress of a channel region. However, when the SMT method is used, depositing a metal layer pattern or a hard mask on a polysilicon layer pattern serving as a gate electrode that is formed on the silicon nitride layer is difficult. Thus, the SMT method may not be applicable to various memory devices such as a dynamic random access memory (DRAM) device.